Recently, along with advances in digital technologies, developments of non-volatile memories capable of saving a large volume of data at high rate are in progress.
A flash memory and a ferroelectric memory are known as such non-volatile memories.
Among them, a flash memory is provided with a floating gate buried in a gate insulating film of an insulated gate field effect transistor (IGFET), and is configured to store information by accumulating charges representing stored information in this floating gate. However, such a flash memory has a drawback that it is necessary to apply a tunnel current, which requires a relatively high voltage, to the gate insulating film at the time of writing or erasing information.
In contrast, a ferroelectric memory, called also as a FeRAM (which stands for a ferroelectric random access memory), is configured to store information by utilizing a hysteresis property of a ferroelectric film included in a ferroelectric capacitor. The ferroelectric film causes polarization depending on a voltage applied between an upper electrode and a lower electrode of the capacitor, and spontaneous polarization remains after the voltage is discontinued. This spontaneous polarization is reversed when the polarity of the applied voltage is reversed. The information is written in the ferroelectric film by causing the directions of the spontaneous polarization to correspond respectively to “1” and “0”. The voltage required for writing the information therein is lower than the voltage used in the flash memory. Moreover, the FeRAM has another advantage that it is possible to write the information at a higher speed than that of the flash memory. By utilizing these advantages, an embedded chip, called a system-on-chip (SOC), formed by combining a FeRAM and a logic circuit is now being examined for use in an IC card, for example.
Here, the crystalline orientation of the lower electrode of the ferroelectric capacitor has a large impact on the ferroelectric properties of a capacitor dielectric film such as an amount of residual polarization charges. For this reason, in order to obtain a ferroelectric capacitor having excellent electric properties, it is essential to control the crystalline orientation of the lower electrode so as to improve the crystallinity thereof.
For example, the paragraph 0131 in Japanese Patent Application Laid-open Publication No. 2003-92391 (JP-A 2003-92391) discloses the technique to use the laminated film as the lower electrode, which is configured by forming an iridium film, an iridium oxide film, a platinum film, a platinum oxide film and another platinum film in this order. JP-A 2003-92391 discloses that it is possible to increase integrated intensity of the (111) orientation of the uppermost platinum film by forming the platinum film in the middle of the laminated film in this manner.
The lowermost iridium film has a function as an antioxidant film for the tungsten plug located therebelow. Here, it is necessary to form the iridium film with a thickness of at least 200 nm in order to prevent oxidation of the tungsten plug effectively. Consequently, this technique has a difficulty of patterning the lower electrode by etching.
Meanwhile, the paragraph 0027 in JP-A 2004-153006 discloses the same lower electrode structure as that in JP-A 2003-92391, which has the same problem as described above.
Moreover, the paragraph 0051 in JP-A 2003-318371 discloses the technique to form a lower electrode configured of a single-layer film or laminated-layer film of a combination of an iridium film, an iridium oxide film, a platinum film, a palladium film, a palladium oxide film, or a gold film.
Meanwhile, JP-A 2003-209179 discloses the technique to form an adhesive layer below a lower electrode. The adhesive layer may include a titanium oxide film, a platinum film, an iridium film, a zirconium film, a titanium film, a platinum oxide film, an iridium oxide film, a zirconium oxide film, a titanium nitride film, a titanium aluminum nitride (TiAlN) film or the like (the paragraph 0087).
Moreover, JP-A 2003-51582 discloses the technique to form a barrier layer made of an aluminum-iridium alloy on a plug, and then to form a platinum film as the lower electrode on this barrier layer. According to JP-A 2003-51582, the aluminum oxide is formed in platinum crystal grain boundaries inside the platinum film by subjecting this platinum film to thermal treatment, and thereby a barrier characteristic of the barrier layer against oxygen is enhanced (the paragraphs 0031 to 0034).
Meanwhile, JP-A Hei 6 (1994)-326270 discloses the technique to form a tungsten film functioning as a diffusion barrier film below a ferroelectric film made of PZT (lead zirconate titanate: PbZrTiO3) in order to prevent diffusion of lead atoms in the ferroelectric film (the paragraph 0041). However, tungsten is a material which is extremely susceptible to oxidation. Consequently, there is a high risk of abnormal oxidation of the diffusion barrier film in an oxygen atmosphere which leads to contact defects.
JP-A Hei 8 (1996)-288239 focuses on a fact that a platinum film is apt to transmit oxygen therethrough, and discloses the technique to form an oxygen barrier layer made of a titanium film below the lower electrode made of platinum, and thereby oxygen is prevented from diffusing from the platinum film to the substrate (the paragraph 0006).
JP-A 2002-368200 discloses the technique to provide an adhesive layer made of hafnium-containing iridium between a diffusion barrier layer and a lower electrode formed on a contact plug in order to prevent detachment of the lower electrode (the paragraph 0061).
Moreover, JP-A 2002-57301 discloses the technique to form an oxygen barrier layer between a tungsten plug and a lower electrode in the paragraphs 0023 and 0030. The oxygen barrier layer is formed either as the laminated film of a titanium film and a titanium nitride film (the paragraph 0023) or as a titanium aluminum nitride film (the paragraph 0030).